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AMD
CPU Details & Features
* Note that due to lack of space, we have to truncate the Instruction Set list above. Instead, we will only list the latest addition to the instruction set. Here's the full list of instruction sets :
|
Listed |
Full List Of |
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3DNow! : |
RISC, IA32, MMX, 3DNow! |
|
3DNow!+ : |
RISC, IA32, MMX, 3DNow!+ |
|
SSE : |
RISC, IA32, MMX, 3DNow!+, SSE |
|
NXbit, SSE2 : |
RISC, IA32, NXbit, MMX, 3DNow!, SSE, SSE2 |
|
NXbit, SSE3 : |
RISC, IA32, NXbit, MMX, 3DNow!, SSE, SSE2, SSE3 |
|
x86-64, SSE2 : |
RISC, IA32, x86-64, MMX, 3DNow!, SSE, SSE2 |
|
x86-64, NXbit, SSE2 : |
RISC, IA32, x86-64, NXbit, MMX, 3DNow!, SSE, SSE2 |
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x86-64, NXbit, SSE3 : |
RISC, IA32, x86-64, NXbit, MMX, 3DNow!, SSE, SSE2, SSE3 |
|
x86-64, NXbit, SSE4a : |
RISC, IA32, x86-64, NXbit, MMX, 3DNow!, SSE, SSE2, SSE3, SSE4a |
** Note that only the CG stepping or newer of the AMD Athlon 64 (Clawhammer) processors supports NXbit. The C0 Clawhammer processors do not support it.
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Index |
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AMD |
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Cyrix |
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Intel |
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VIA |
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