SDRAM Page Hit Limit
Common Options : 1 Cycle, 4 Cycles, 8 Cycles, 16 Cycles, 32 Cycles
Quick Review
This BIOS feature is designed to reduce the data starvation that occurs whern pending non-page hit requests are unduly delayed. It does so by limiting the number of consecutive page hit requests that are processed by the memory controller before attending to a non-page hit request.
Generally, the default value of 8 Cycles should provide a balance between performance and fair memory access to all devices. However, you can try using a higher value (16 Cycles) for better memory performance by giving priority to a larger number of consecutive page hit requests. A lower value is not advisable as this will normally result in a higher number of page interruptions.
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