AGP Performance Control
Common Options : Enabled, Disabled
Quick Review
This BIOS feature allows you to reduce the time the AGP bus-mastering device has to wait before it can initiate a read or write command, to only one wait state. This speeds up all reads and writes that the AGP bus-master makes.
When enabled, the AGP read/write latency is set to 1 clock cycle.
When disabled, the AGP read/write latency is set to 2 clock cycles.
So, for better AGP read and write performance, enable this feature. Disable it only if you notice visual anomalies like wireframe effects and pixel artifacts or if your system hangs on running software that make use of AGP texturing.
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