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 07 March 2005
 PDP Systems
  http://www.pdpsys...
 RAM
 Chai
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Test Results (Continued)

CAS 2.5 Results

CAS 2.5 is probably the sweet spot for TCCD modules. There is no need to sacrifice too much in terms of clock speed and yet you will be able to maintain reasonably tight timings.

Parameters
Values
Unit
Row Active Delay (tRAS)
7
Clock Cycles
RAS-to-CAS Delay (tRCD)
3
Clock Cycles
Row Precharge Delay (tRP)
3
Clock Cycles
Stock Voltage
2.65
V
Boosted Voltage
2.85
V

 

Memory Clock
2.65V
2.85V
250MHz / 500MHz DDR
Stable
Stable
253MHz / 506MHz DDR
Stable
Stable
255MHz / 510MHz DDR
Stable
Stable
258MHz / 516MHz DDR
Stable
Stable
260MHz / 520MHz DDR
Stable
Stable
263MHz / 526MHz DDR
Stable
Stable
265MHz / 530MHz DDR
Stable
Stable
268MHz / 536MHz DDR
Stable
Stable
270MHz / 540MHz DDR
Stable
Not Stable
273MHz / 546MHz DDR
Stable
Not Stable
275MHz / 550MHz DDR
Stable
Not Stable
278MHz / 556MHz DDR
Not Stable
Not Stable
280MHz / 560MHz DDR
Not Stable
Not Stable
283MHz / 566MHz DDR
Not Stable
Not Stable
285MHz / 570MHz DDR
Not Stable
Not Stable

Just like the CAS 2 results, this is equally as impressive!

At the timings of 2.5-3-3-7, PDP Systems has only rated these modules to run at 250MHz. But they didn't stop there. In fact, they didn't stop until they hit 275MHz! That's equivalent to PC4400 speed!

By looking at the results table, you can tell that it would be pointless for you to run them at higher voltages as these modules doesn't seem to appreciate additional voltage.

 

CAS 3 Results

History has shown that even with CAS Latency 3 support, TCCD never really needed these slower timings for higher clock speed unless maximum memory speed is what you must have, instead of maximum performance. Let's see how they do!

Parameters
Values
Unit
Row Active Delay (tRAS)
8
Clock Cycles
RAS-to-CAS Delay (tRCD)
4
Clock Cycles
Row Precharge Delay (tRP)
4
Clock Cycles
Stock Voltage
2.65
V
Boosted Voltage
2.85
V

 

Memory Clock
2.65V
2.85V
275MHz / 550MHz DDR
Stable
Stable
278MHz / 556MHz DDR
Stable
Stable
280MHz / 560MHz DDR
Stable
Not Stable
283MHz / 566MHz DDR
Not Stable
Not Stable
285MHz / 570MHz DDR
Not Stable
Not Stable

Increasing the timings only yielded a small increase of 5MHz over what we attained with a CAS latency of 2.5. But then again, our test bed could have prevented the memory from reaching a much higher clock speed.

 

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