SDRAM Cycle Time Tras/Trc
Common Options : 5/6, 6/8
Quick Review
This BIOS feature determines the tRAS and the tRC parameters of the SDRAM memory module.
tRAS refers to the SDRAM Row Active Time, which is the length of time the row will remain open for data transfers.
tRC, on the other hand, refers to the SDRAM Row Cycle Time, which determines the minimum number of clock cycles a memory row takes to complete a full cycle, from row activation up to the precharging of the active row.
The default setting is 6/8 which is more stable and slower than 5/6. The 5/6 setting cycles faster but it may not leave the row open long enough for burst transactions to complete. When this happens, data may be lost and the contents of the memory cells may be corrupted.
For better memory performance, you should try the 5/6 setting. But increase it to 6/8 if your system becomes unstable.
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