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AGP Secondary Lat Timer

Common Options : 00h, 20h, 40h, 60h, 80h, C0h, FFh

Quick Review

This BIOS feature controls how long the AGP bus can hold the PCI bus (via the PCI-to-PCI bridge) before another PCI device takes over. The longer the latency, the longer the AGP bus can retain control of the PCI bus before handing it over to another PCI device.

Normally, the AGP Secondary Latency Timer is set to 20h (32 clock cycles). This means the AGP bus' PCI-to-PCI bridge has to complete its transactions within 32 clock cycles or hand it over to the next PCI device.

For better AGP performance, a longer latency should be used. Try increasing it to 40h (64 cycles) or even 80h (128 cycles). The optimal value for every system is different. You should benchmark your AGP card's performance after each change to determine the optimal latency for your system.

If you set the AGP Secondary Latency Timer to a very large value like 80h (128 cycles) or C0h (192 cycles), it is recommended that you set the PCI Latency Time to 32 cycles. This provides better access for your PCI devices that might be unnecessarily stalled if both the AGP and PCI buses have very long latencies.

In addition, some time-critical PCI devices may not agree with a long AGP latency. Such devices require priority access to the PCI bus which may not be possible if the PCI bus is held up by the AGP bus for a long period. In such cases, it is recommended that you keep to the default latency of 20h (32 clock cycles).

 

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