Buy the ARP T-Shirt! BIOS Optimization Guide Money Savers!
 

   
Desktop Graphics Card Comparison Guide Rev. 33.0
Covering 628 desktop graphics cards, this comprehensive comparison allows you ... Read here
BIOS Option Of The Week - Virtualization Technology
Since 1999, we have been developing the BIOS Optimization Guide, affectionately known... Read here
   
   
Buy The BOG Book Subscribe To The BOG! Latest Money Savers!

PCI Master Bus TimeOut Control

Common Options : 1 - 7, Disabled

Quick Review

What this BIOS feature does is limit the time a device has to start writing data to the PCI bus. If the first data write by the device cannot be completed by the timeout period, then it is disconnected and control of the PCI bus granted to another device. This prevents a stalled device from unnecessarily tying up the PCI bus.

When set to any integer from 1 to 7, all PCI devices must abide by a timeout period for the first data transfer. The timeout period is calculated by multiplying the value set with 32 clock cycles. For example, if you set it to 2, then the timeout period will be 64 clock cycles.

When set to Disabled, this feature is disabled and PCI devices can take as long as they want to complete their first data transfer. Even if the device stalls, it will not release control of the PCI bus.

It is recommended that you set a short timeout period to prevent any stalled device from hogging the PCI bus.

 

Support Tech ARP!

If you like our work, you can help support out work by visiting our sponsors, participate in the Tech ARP Forums, or even donate to our fund. Any help you can render is greatly appreciated!

 


If you like to know more about this and other BIOS settings, why not subscribe to the full BIOS Optimization Guide?
Click here to find out how you can do that now!


Links: Discuss BIOS options here in our forums | Back to the list of BIOS options

 
 


Copyright © Tech ARP.com. All rights reserved.